The present invention generally relates to semiconductor processing, and in particular to a system and method for in-situ monitoring and controlling of a gaseous phase chemical trim process using real-time feed forward control based on scatterometry analysis.
In the semiconductor industry, there is a continuing trend toward higher device densities. To achieve these high densities there have been and continue to be efforts toward scaling down device dimensions (e.g., at sub-micron levels) on semiconductor wafers. In order to accomplish such high device packing densities, smaller and smaller feature sizes are required. This may include the width and spacing of interconnecting lines, spacing and diameter of contact holes, and the surface geometry, such as corners and edges, of various features. The dimensions of and between such small features can be referred to as critical dimensions (CDs). Reducing CDs, and reproducing more accurate CDs facilitates achieving such higher device densities.
One method for achieving smaller features has been to perform a gaseous phase chemical trim process on a patterned photoresist. Such a gaseous phase chemical trim process can improve lithography by using a gas containing a clear ving compound to trim resist features to smaller sizes. The gas containing a cleaving compound can be employed to controllably decrease the size of developed resist structures. Conventional trim processes have either lacked feedback control systems, have employed pre-calculated gas exposure times, have employed pre-calculated gas exposure temperatures, have employed pre-calculated gas-exposure pressures, have employed a second development step and/or may have employed indirect feedback (e.g., monitoring evacuated gasses) control, which is based on indirect information to regulate gaseous phase chemical trim processes. Such pre-determined calculations and/or indirect feedback control do not provide adequate monitoring and thus do not facilitate precise control over gaseous phase chemical trim processes. Furthermore, such indirect control and/or pre-calculated parameters (e.g., exposure time, exposure temperature, exposure pressure) do not account for wafer to wafer variations, do not account for wafers with varying feature densities and do not account for lot to lot variations. Monitoring tools employed in conjunction with metrology based feedforward information are known in the art and provide improvements over conventional non feed-forward based control. But such metrology based feed-forward systems can be improved by more accurate monitoring, better CD recognition and more precise feed-forward information.
The process of manufacturing semiconductors, or integrated circuits (commonly called ICs, or chips), typically consists of more than a hundred steps, during which hundreds of copies of an integrated circuit may be formed on a single wafer. Each step can affect the CDs of the ICs. Generally, the manufacturing process involves creating several patterned layers on and into the substrate that ultimately forms the complete integrated circuit. This layering process creates electrically active regions in and on the semiconductor wafer surface. The size, shape and isolation of such electrically active regions, and thus the reliability and performance of integrated circuits employing such regions thus depend, at least in part, on the precision with which trimming can be performed.
Unfortunately, commonly used fabrication systems check devices for CDs near or at the end of fabrication, or at pre-scheduled time intervals. These types of endpoint and interval detection methods can be problematic for several reasons. For example, at later stages in the fabrication process, the presence of at least one malformed portion of a device may render the whole semiconductor device unusable, forcing it to be rejected. In addition, post-fabrication detection/quality control data do not provide a user with real-time information related to the device being fabricated. Post-fabrication data may only allow an estimation or a projection as to what adjustments are needed to correct the fabrication errors and/or flaws. Such estimations and/or projections concerning necessary adjustments may lead to continued or recurring fabrication errors. Moreover, such a lengthy adjustment process may cause subsequent fabricated wafers to be wasted in the hopes of mitigating gaseous phase chemical trim process errors.
Visual inspection methods have been important in both production and development of integrated circuits. Visually inspecting developed photoresist patterns from a dose-focus matrix is well-known in the art. While visual inspection techniques may be simple to implement, they are difficult to automate. Further, visual techniques employing scanning electron microscopes (SEM) and atomic force microscopes (AFM) can be expensive, time-consuming and/or destructive.
The requirement of small features (and close spacing between adjacent features) requires high resolution photolithographic processes. In general, lithography refers to processes for pattern transfer between various media. It is a technique used for integrated circuit fabrication in which a silicon slice, the wafer, is coated uniformly with a radiation-sensitive film, the resist, and an exposing source (such as optical light, X-rays, or an electron beam) illuminates selected areas of the surface through an intervening master template, the photomask, for a particular pattern. The lithographic coating is generally a radiation-sensitized coating suitable for receiving a projected image of the subject pattern. Once the image is projected, it is indelibly formed in the coating. The projected image may be either a negative or a positive of the subject pattern. Exposure of the coating through the photomask causes a chemical transformation in the exposed areas of the coating thereby making the image area either more or less soluble (depending on the coating) in a particular solvent developer. The more soluble areas are removed in the developing process to leave the pattern image in the coating as less soluble polymer.
Projection lithography is a powerful and essential tool for microelectronics processing. However, lithography is not without limitations. Patterning features having dimensions of about 0.25 xcexcm or less with acceptable resolution is difficult at best, and impossible in some circumstances. Patterning small features with a high degree of critical dimension control is also very difficult. Procedures that increase resolution, improve critical dimension control and provide small features are therefore desired.
Due to the extremely fine patterns that are exposed on the photo resist, controlling a gaseous phase chemical trim process, whereby CDs on a patterned photoresist are reduced, is a significant factor in achieving desired critical dimensions. Achieving greater precision in gaseous phase chemical trim processes can result, for example, in achieving more precise CDs (e.g., desired lengths and widths between layers, between features and within features). Thus, an efficient system, and/or method, to monitor and control gaseous phase chemical trim processes is desired to facilitate manufacturing ICs exhibiting desired critical dimensions.
The following presents a simplified summary of the invention in order to provide a basic understanding of some aspects of the invention. This summary is not an extensive overview of the invention. It is not intended to identify key or critical elements of the invention or to delineate the scope of the invention. Its sole purpose is to present some concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later.
The present invention provides a system that facilitates controlling a gaseous phase chemical trim processes involved in semiconductor manufacturing. An exemplary system can employ one or more light sources arranged to project light onto one or more features and/or gratings on a wafer, and one or more light sensing devices (e.g., photo detector, photodiode) for detecting light reflected and/or refracted by the one or more features and/or gratings. A grating is usually divided into a large number of sufficiently thin planar grating slabs to approximate an arbitrary profile. The light reflected from the one or more features and/or gratings is indicative of at least one parameter of a gaseous phase chemical trim processes (e.g., percent completion of trimming) that can be measured to determine whether desired critical dimensions (CDs) have been achieved and to determine whether adaptations to one or more gaseous phase chemical trim process parameters should be undertaken. One example gaseous phase chemical trim process concerns a method of treating a patterned resist involving the steps of providing the patterned resist having structural features of a first size, the patterned resist containing a polymer having a labile group; exposing the patterned photoresist to one or more chemicals in a gas containing at least one cleaving compound to form a thin deprotected resist layer at an interface between the patterned resist and the gas; and removing the thin deprotected resist layer leaving the patterned resist having structural features of a second size, wherein the second size is smaller than the first size.
One or more gaseous phase chemical trimming components can be arranged to correspond to a particular wafer portion. Alternatively, one or more gaseous phase chemical trimming components can be employed to facilitate trimming various wafer portions. The gaseous phase chemical trimming components may be, for example, apparatus that introduce a gaseous phase chemical cleaving compound (trimming compound) into a reaction chamber that holds the patterned photoresist. It is to be appreciated that a variety of trimming compounds and suitable gaseous phase chemical trimming components may be employed with the present invention. The gaseous phase chemical trimming components are selectively driven by the system to trim away patterned photoresist and/or other materials at a desired location, at a desired rate, to a desired depth and/or to a desired width. The gaseous phase trim progress is monitored by the system by comparing the critical dimensions (e.g., space between features and/or gratings, depth and/or height of the features and/or gratings) on the wafer to desired critical dimensions. Data gathered during such monitoring can be analyzed to determine whether adaptations to the chemical trim process are desired. As a result, more optimal trimming is achieved by controlling the gaseous phase chemical trimming components that are trimming the portions of the wafer, which in turn increases IC quality. Additionally, and/or alternatively, data concerning gaseous phase chemical trim process conditions that resulted in favorable and/or unfavorable CDs can be stored to facilitate reproducing favorable gaseous phase chemical trim process conditions for subsequent portions of the wafer being trimmed and/or for subsequent wafers.
One aspect of the present invention provides a system for monitoring and regulating a gaseous phase chemical trim process. The system includes a gaseous phase chemical trimming component that can trim at least one portion of a wafer and a trim component driving system for driving the gaseous phase chemical trimming component. The system includes fabricating gratings on the wafer and a system for directing light toward gratings located on the wafer. The system further includes a trim monitoring system operable to measure trimming parameters from light reflected from the gratings and a processor operatively coupled to the trim monitoring system and the trim component driving system. The processor receives trim parameter data from the measuring system and analyzes the trim parameter data by comparing the measured trim parameter data to stored trim parameter data to generate a feed-forward control data operative to control the chemical trimming component.
Another aspect of the present invention provides a method for monitoring and regulating a gaseous phase chemical trim process. The method includes logically partitioning a wafer into one or more portions. The method then establishes one or more gratings on the wafer and directs an incident light onto the gratings and collects light reflected from the grating. The reflected light is measured to determine one or more critical dimensions associated with the grating. The method includes computing adjustments for gaseous phase chemical trimming components by comparing scatterometry signatures associated with the measured critical dimensions to scatterometry signatures associated with stored critical dimensions and employing t he adjustments to adapt the chemical trim process. An example gaseous phase chemical trim process involves the steps of forming a patterned resist, the patterned resist containing a polymer having an acid labile pendent group; exposing the patterned resist to a gas containing an acid, thereby forming a thin deprotected resist layer at an interface between the patterned resist and the acid containing gas; and removing the acid containing gas and the thin deprotected resist layer thereby providing a trimmed patterned resist.